1. Field of the Invention
This invention relates to a CCD imager in which a plurality of light receiving sections are formed for photoelectrical conversion on a semiconductor substrate and image signals are outputted from signals transferred from these light receiving sections. More particularly, it relates to a vertical overflow drain structure CCD imager in which electrical charges are swept off into the semiconductor substrate.
2. Description of the Prior Art
The CCD imager in general includes a number of light receiving sections arrayed in a two-dimensional matrix and signal charges for producing the image information are produced in these light receiving sections. As the structure of the light receiving section of this CCD imager, there is known a structure in which a P type well region is formed in an n type semiconductor substrate and in which are provided a P type semiconductor surface region for suppressing the current section and an n.sup.+ type semiconductor region forming a photodiode on the bottom side of the P type semiconductor surface region. The CCD imager of this structure is shown for example in the "Nikkei Micro-Devices", issue of October, 1987, p. 60-67, published by Nikkei McGraw Hill.
As the technique of sweeping off excess charges from the light receiving section, there is known a technique of providing a lateral overflow drain. The technique of sweeping off excess electron charges by specially designing the potential along the depth of the light receiving section, as disclosed in the Laid Open Japanese Patent Publication No. 18172/1986, is also known as the pertinent technique.
If the light receiving section has a pnpn structure, looking from its surface, it is necessary for the impurity concentration of the n type semiconductor substrate to be of the order of 1.times.10.sup.14 cm.sup.-3, in order to provide for blooming margin and control at the three voltage level.
However, because of the reverse-biased junction between the n type semiconductor substrate and the p type well region, the extent of the depletion layer is spread to about 30 .mu.m for the aforementioned impurity concentration of the semiconductor substrate, such that the shuttering voltage is increased to as high as 50 V in terms of the DC value. The result is a deteriorated reliability of the shuttering operation and the step-like regions produced on the monitor display surface on account of the infeasibility of the shuttering operation.
On the other hand, it is desirable that the amount of the stored charges be not increased at an illuminance corresponding to saturation. However, this has not been achieved satisfactorily in the above described light receiving section. Hence, a demand has been raised for improving knee characteristics.